VSAT Electronics hardware

The first stage of electronics is a individual charge sensitive preamplifiers placed in the same box as the detectors: two different types for FADs and strips.

FADs preamplifiers consist of two parallel charge sensitive bipolar devices LABEN 5243 which are very well matched with to the large detector capacitance (500 pF at full depletion) and together with FADs gives a total noise RMS about 60 KeV (measured in laboratory with 500 ns shaped time). This figure was increased by factor three when circuit mounted in LEP tunnel due to various sources of noise.
The surface mounted preamplifiers MSP16 with 16 channels was used for the strip planes. They have a 50 ns rise time for output signals and the together with strip planes gives a total noise RMS equal 45 KeV (laboratory measurements).

Next stage of electronic readout is two so-called tunnel crates located a 3 meters away from pairs of modules (forward or backward) in the LEP tunnel. These crates consist of the following devices: MUX (multiplexing) cards, DPC, APC, energy supply emergency switch and Tunnel Processor.

The main purpose of the multiplexing card is to amplify and shape the analog signals from VSAT before next stage. The 124 channels (FADs + strips) from each module are coming to the for eight MUX cards (one for FADS, three for Y strips, four for X strips). Each analog channel made of HARRIS 2625 receiver and HARRIS 2425 sample-and-hold and MOTOROLA LF357 amplifying stage for strips for strips with 650 ns shaping time. Overall time of process is around 1.5 msec.
The MUX cards for FADs also have analog adder and some decision logic to compare the analog sum signal from FADs with two different thresholds.

Tunnel processor, based on MOTOROLA 68HC11 with RS232 connector for control access. It able to make the following actions:

• set the thresholds,
• select which FAD planes should be added to the analog sum,
• monitor the temperatures of VSAT detectors and preamplifiers,
• shut off the VSAT detectors and preamplifiers by emergency switch if the temperature exceeds 70 K, give a warning if the temperature rise above 60 K.
• provide a report about overall status,
• control test signals,
• provide information about bias voltage and currents in detectors to the G64 processor in FASTBUS crate.
• restart itself if the output communication become irregular.

The last stage of electronic readout is the VSAT crate in DELPHI barrack D2 located a 40 meters away from tunnel crates (forward or backward).
These stations consist of the following devices (FASTBUS and NIM cards): PATCH Card to receive and drive the signals from MUX cards with some amplification (last in this case!), two FDDP (Fast Digital Data Processor) one LTS (Local Trigger Supervisor) and one G64 (together with STIC) for Slow Control.

FDDP (one per arm) is based on the fast DSP (TMS320). It performs the analog-to-digital conversion (using 8 bit 10 MHz FADC Thomson 8328 for strips signals and 12 bit 1 MHz ADC Crystal CSZ5412 for FADs signals) of the multiplexed signals sends the control signals back to the MUX cards and writes formatted data into output buffer memory.

The LTS (Local Trigger Supervisor) provides the as hold and reset signals to MUX cards and main control signals to FDDPs. The trigger decision is totally based on the eight digital outputs from the eight comparators which belongs to four FAD MUX cards. There are only two signals from each module - below/above the high threshold and below/above the low threshold. Trigger information consist of 2 groups of two bits - first is the VSAT module number, second is the energy with respect of two thresholds (00, 01, 10 or 11). Only five types of events can be selected by LTS (look for Physical Explanation of these definitions):

• Bhabha (BH)
  - defined as coincidence between hits into diagonal modules with signals above thresholds.
• Single electron (SE)
  - defined as energy deposition above the low energy thresholds in any of four modules. Can be immediately down-scaled with different factors for outer and inner modules (different SE background conditions).
• False Bhabha (FB) or Accidental Bhabha
  - defined as coincidence between one module and it's diagonal module but delayed by four LEP bunch crossings. Energy thresholds is high as for Bhabha trigger.
• Testin
  - then the preamplifiers are working in test mode with variable amplitude, shape and frequency.
• Alpha
  - then the alpha particle source are used to calibrate the FADs.

Slow Controls tasks such as bias currents and voltage monitoring is provide by G64 processor shared with STIC.

Any VSAT event in FDDP data buffer (which have address counter and number of events counter) is accompanied by LTS trigger information to DELPHI.

Since 1995 then LEP was announced new minibunch scheme for 45 GeV beams some new hardware for FASBUS crate was installed. The main aim of these inovations was to make able for VSAT to find the peak of minibunches which was separated from each other only by a few hundred nanoseconds - less then time of signal from detector (around 1 mcsec). The peakfinder electronics was designed and made at Elementary Particle Physics Department of Lund University, Sweden. It made a HOLD signals which mark the exact position of peak in time by using the number of minibunches and the bunch interspace time information which must be provided from the central DELPHI Data Acquisition System. Some signals was removed from PATCH card and connected to the new peakfinder card. From the peakfinder card the four HOLD signals to the FADs (one for each mdoule), and four signals to the strips (one for each module) are go into PATCH card and tunnel crates, there some minor changings was made also. PATCH card was modified to work with new HOLD signal from new peakfinder. Access to the details of modification is here.